As integrated circuits accommodate ever more transistors, the number of test vectors needed to test logic ICs rises dramatically. Design-automation companies are pursuing two design-for-test (DFT) ...
Monitoring the health of a chip post-manufacturing, including how it is aging and performing over time, is becoming much more important as ICs make their way into safety-critical applications such as ...
SAN JOSE, Calif. — In 1992, a little-known startup emerged with promises to propel built-in-self-test (BIST) technology into the mainstream. The startup, LV Software, also launched a line of ...
There is a rapidly growing interest in the use of structural techniques for testing random logic. In particular, much has been published on new techniques for on-chip compression of automatic test ...
Achieving functional safety levels mandated by the ISO 26262 standard requires periodic testing of a vehicle’s electronics. This testing can be applied at three distinct time periods, each with its ...
The persistent growth of mobile computing is driving an increasing need to manage power consumption within semiconductor devices. This has significant implications on the design and test of these ...
Chip Design Engineers are on a binge today, drawing up design plans for unprecedented, ever-increasing functionality on a single chip. Many times this surge encounters a brick wall in the form of ...
Two test strategies are used to test virtually all IC logic: automatic test pattern generation (ATPG) with test pattern compression and logic built-in self-test (BIST). This article will describe how ...
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