Forbes

SiFive Is Leading The Way For Innovation On RISC-V

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...
Semiconductor Engineering

Manage Your Risk In RISC-V

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...
Design And Reuse

Democratizing Chip Design: Empowering the Next Generation of Engineers with RISC-V Expertise

RISC-V ISA is evolving powerfully as an industry-standard open ISA, supporting heterogeneous computing architectures for next-generation SoCs that use all kinds of processors, including CPUs, GPUs, ...
Liliputing

RISC-V Mainboard for the Framework Laptop 13 is now available for $199

Last year computer maker Framework announced plans to release a RISC-V Mainboard for its 13 inch laptops. Then the company launched an early access program in November. And now the DeepComputing ...
BIOENGINEER

Machine learning spots RISC-V hardware attacks from processor performance counters

Researchers built the first public RISC-V dataset combining hardware performance counters with instruction traces and showed ...
EDN

The Rise of RISC-V for Custom Innovation

Proprietary, closed architectures have traditionally limited companies in a few ways. First, it’s important to consider that for a long time, there were heavy restrictions on customization. Some of ...
Semiconductor Engineering

RISC-V Wants All Your Cores

RISC-V is no longer content to disrupt the CPU industry. It is waging war against every type of processor integrated into an SoC or advanced package, an ambitious plan that will face stiff competition ...
GitHub

Spike RISC-V ISA Simulator

Spike, a RISC-V ISA Simulator. Contribute to riscv-software-src/riscv-isa-sim development by creating an account on GitHub.
Electronic Design

RISC-V Standardizes E-Trace and Binary Interface

RISC-V International has released a number of new specifications that enhance the RISC-V ecosystems. I talked with Chief Technology Officer for RISC-V International, Mark Himelstein, about their ...
BetaNews

How RISC-V is changing the server market [Q&A]

Data centers have a strong emphasis on performance and delivering workloads whilst remaining power efficient. In order to deliver on these aims the open instruction set architecture RISC-V is ...
Geeky Gadgets

How RISC-V is Disrupting x86 and ARM in 2025

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...